Reconfigurable system is a promising alternative to
deliver both flexibility and performance at the same time. New
reconfigurable technologies and technology dependent tools have
been developed, but a system-level design methodology to
support system analysis and fast design space exploration is
missing. In this paper, we present a System C-based system-level
design approach..The main focuses are the resource estimation
to support system analysis and reconfiguration modeling for fast
performance simulation. The approach was applied in a real
design case of a WCDMA detector on a commercially available
reconfigurable platform. The run time reconfiguration was used
and the design showed 40% area saving when compared to a
functionally equivalent fixed system and 30 times better in
processing time when compared to a functionally equivalent pure
software design.
Published In : IJCAT Journal Volume 1, Issue 4
Date of Publication : 31 May 2014
Pages : 47 - 52
Figures : 08
Tables : 02
Publication Link : Reconfigurable System on Chip C-Based Design
Methodology
Mr. P. R. Bokde : working as Assistant Professor in Department of
Electronics at Priyadarshini Bhagwati College of Engineering,
Nagpur. He is presently pursuing Ph. D. from Nagpur University,
Nagpur.He has completed M. Tech. (VLSI), B.E. (ETRX) from
Nagpur university, Nagpur. He has presented many National and
International papers and attended National & International
conferences. He has a special interest in Communication, Signal
Processing and VLSI.
Mr. P. N. Aerkewar : working as Assistant Professor in
Department of Electronics at Priyadarshini Bhagwati College of
Engineering, Nagpur. He is presently pursuing Ph. D . from
Nagpur University, Nagpur.He has completed M. Tech. (VLSI),
B.E. (ETRX) from Nagpur university, Nagpur. He has a special
interest in Digital Electronics, Signal Processing and VLSI.
Mr. P. M. Palkar : presently working as Assistant Professor in
Department of Electronics at Priyadarshini Bhagwati College of
Engineering, Nagpur. He is pursuing Ph. D. from Nagpur
University, Nagpur.He has completed M. E. (Digital Electronics)
from Amaravati University and B.E. (Electronics) from SGGS,
Nanded, He has a special interest in Digital Image Processing
,Digital Communication and VLSI.
Reconfigurable system
WCDMA
System- C
Based
The SystemC-based approach to support design of RSoC
is described in this paper. The main focus is how to enable
fast design space exploration at the system level. The
estimation approach to support system analysis, the
reconfiguration modeling technique and a tool to support
automatic SystemC code generation are provided. Our
models work at the transaction level, so the system
performance can be quickly evaluated in simulation but
without losing too much information details from the
system architecture. A design of WCDMA detector design
case has been carried out and it has been fully
implemented in a real reconfigurable platform. The design
case has validated that the SystemC-based approach is
very useful in providing the supports to RSoC design at
the system level.
[1] Xilinx, www.xilinx.com
[2] Altera, www.altera.com
[3] PACT XPP technologies, www.pactcorp.com
[4] QuickSilver Technologies, www.qstech.com
[5] Triscend, “A7 Field Configurable System-on-Chip
datasheets”, www.triscend.com (2004)
[6] Motorola, www.motorola.com
[7] A. Pelkonen, K. Masselos, M. Cupak, “System-Level
Modeling of Dynamically Reconfigurable Hardware
with SystemC”, Proc. IPDPS’03, 2003, pp. 174-181
[8] Y. Qu, K. Tiensyrjä, K. Masselos, “System-level
modeling of dynamically reconfigurable co-processors”,
Proceedings of the 14th International Conference on
FPL (LNCS 3203), 2004, pp. 881-885
